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Posted

Hi.I`m working on a stm32f429 discovery and have problem with the LCD.I`v done any thing for SPI interface with iLi9341 and that was successful.but I wanna configure iLi9341 with SPI to send display data through st`s LTDC peripheral and thats my big problem.can anyone help me?

Posted

Hello @TomCat and welcome to the µGFX community!

I moved your post out of the other topic and created a new one.

To your question: The board file for the STM32F429-Discovery that you find in the µGFX library repository already does that for you: It uses SPI for the configuration and then enables the RGB interface so that the LTDC can be used. What exactly is the big problem that you're facing?

Posted
1 hour ago, TomCat said:

Hi.I`m working on a stm32f429 discovery and have problem with the LCD.I`v done any thing for SPI interface with iLi9341 and that was successful.but I wanna configure iLi9341 with SPI to send display data through st`s LTDC peripheral and thats my big problem.can anyone help me?

Hi!

If you want, I can give you and this community my working code for ADSP-BF527 (ILI9341 in 6-bit RGB mode). Is this help you?

Posted

you did a good job.I`m not sure I have time to spend on µGFX library, I write direct code.my problem is that the SPI works well, but when I configure the ili9341 for rgb565 and then using LTDC, the LCD doesnt work well and i dont know whats the problem.here is the code for initializing ili9341:

 

void lcd_initialization(void){
lcd_cmd(0x28);             //Display Off
lcd_cmd(0x11);             //Exit Sleep,Start internal OSC
delay_ds(120000);          //delay for 120 miliseconds

    lcd_cmd(0x00B6);            //Display Function Control
    lcd_data(0x000A);   
    lcd_data(0x0A2);
        lcd_data(0x27);
        lcd_data(0x4);

    lcd_cmd(0x00B4);            //Display Inversion Control
    lcd_data(0x004); 
 
    lcd_cmd(0xB5);              //Blanking Porch Control 
      lcd_data(0x4);
        lcd_data(0x2);
        lcd_data(0xa);
        lcd_data(0x14);
    
        
        lcd_cmd(0xCF);          //Power control B         
        lcd_data(0x0);              
        lcd_data(0x81);             
        lcd_data(0xc0);             

        lcd_cmd(0xEF);             
        lcd_data(0x3);             
        lcd_data(0x80);             
        lcd_data(0x2);             

        lcd_cmd(0xED);           // Power on sequence control           
        lcd_data(0x64);             
        lcd_data(0x03);             
        lcd_data(0x12);             
        lcd_data(0x81);             
    
        lcd_cmd(0xE8);                // Driver timing control A            
        lcd_data(0x85);             
        lcd_data(0x01);             
        lcd_data(0x798);
    
        lcd_cmd(0xCB);               // Power control A      
        lcd_data(0x39);             
        lcd_data(0x2c);             
        lcd_data(0x0);             
        lcd_data(0x34);             
        lcd_data(0x2);             

        lcd_cmd(0x00F7);           // Pump ratio control   
        lcd_data(0x0020);

        lcd_cmd(0x00CA);
        lcd_data(0x0083);     
        lcd_data(0x0002);
        lcd_data(0x0000);

        lcd_cmd(0x00EA);                // Driver timing control B         
        lcd_data(0x0000);
        lcd_data(0x0000);   

        lcd_cmd(0x00C0);                //Power Control 1
        lcd_data(0x005);

        lcd_cmd(0x00C1);                //Power Control 2 
        lcd_data(0x0011);                             

        lcd_cmd(0x00C5);                //VCOM Control 1
        lcd_data(0x0045);  
        lcd_data(0x0045);

        lcd_cmd(0x0036);                //Memory Access Control 
        lcd_data(0x0008);
        
    lcd_cmd(0x00B1);                //Frame Rate Control (In Normal Mode/Full Colors) 
    lcd_data(0x0000); 
    lcd_data(0x001b);         
     
        lcd_cmd(0x00C7);                //VCOM Control 2
        lcd_data(0x00A2);

        lcd_cmd(0x00F2);                // Enable 3G
        lcd_data(0x000);

        lcd_cmd(0x26);                  //Gamma Set 
        lcd_data(0x1);     

        lcd_cmd(0x00E0);                //Positive Gamma Correction
        lcd_data(0x001F);        
        lcd_data(0x001a); 
        lcd_data(0x0018);     
        lcd_data(0x000a); 
        lcd_data(0x000f); 
        lcd_data(0x0006);     
        lcd_data(0x0045); 
        lcd_data(0x0087);      
        lcd_data(0x0032); 
        lcd_data(0x000a); 
        lcd_data(0x0007);     
        lcd_data(0x002); 
        lcd_data(0x001f); 
        lcd_data(0x0007); 
        lcd_data(0x0005);
        lcd_data(0x0000);
    
        lcd_cmd(0x00E1);                 //Negative Gamma Correction
        lcd_data(0x0000);      
        lcd_data(0x0025); 
        lcd_data(0x0027);    
        lcd_data(0x0005);        
        lcd_data(0x0010); 
        lcd_data(0x0009);      
        lcd_data(0x003a);   
        lcd_data(0x0078); 
        lcd_data(0x004d); 
        lcd_data(0x0005);      
        lcd_data(0x0018);     
        lcd_data(0x000d); 
        lcd_data(0x0038); 
        lcd_data(0x003a); 
        lcd_data(0x001F); 

delay_ds(120000);          

        lcd_cmd(0x002A);                  //Column Address Set 
        lcd_data(0x0);
        lcd_data(0x0);
        lcd_data(0x0000);
        lcd_data(0x00EF);

        lcd_cmd(0x002B);                  //Page Address Set
        lcd_data(0x0000);
        lcd_data(0x0000);
        lcd_data(0x0001);
        lcd_data(0x003F);     

        lcd_cmd(0x003A);                  //COLMOD: Pixel Format Set
        lcd_data(0x0055);
         
        lcd_cmd(0xF6);                    //Interface Control 
        lcd_data(0x1);
        lcd_data(0x30);
        lcd_data(0x0);


    lcd_cmd(0xB7);                    //Entry Mode Set  
        lcd_data(0x7);

    lcd_cmd(0xB0);                    //RGB Interface Signal Control 
        lcd_data(0x40);

        lcd_cmd(0x0029);                  //Display ON
        lcd_cmd(0x002C);                  //Memory Write
}

 

and below is for stm32f429 LTDC:

#include "stm32f4xx.h"
#include "initialization.h"
#include "White-Tiger-vertical.h"
#include "CAR.h"

#define LCD_WIDTH     320    //Vadr
#define LCD_HEIGHT    240   //Hadr

#define HFP   10
#define HSYNC 10
#define HBP   20

#define VFP   4
#define VSYNC 2
#define VBP   2

#define ACTIVE_W (HSYNC + LCD_WIDTH + HBP - 1)
#define ACTIVE_H (VSYNC + LCD_HEIGHT + VBP - 1)

#define TOTAL_WIDTH  (HSYNC + HBP + LCD_WIDTH + HFP-1)   //horizontal period
#define TOTAL_HEIGHT (VSYNC + VBP + LCD_HEIGHT + VFP-1)  //vertical period

#define t2start TIM2->CR1|= 0x0001            // Enable Counting


int delay_ds(int us){
    
    
    
 int value;
 value=((us*90)-1);
 TIM2->ARR=value;                             //giving value for counting
 t2start;                                       // Enable Counting            
 while(TIM2->CR1&1);
 us=0;
 value=0;   return(0);}

 
 
 
 

 
 
 int main(void){
int j,i,x=0;
 
RCC->APB2RSTR=0;    
RCC->AHB1ENR=0x1ff;    
RCC->APB1ENR|=0xb;                //CONNECTS clock to TIM2 and TIM3 and TIM5    
RCC->APB2ENR|=1<<20;               //connect clock to SPI5
RCC->APB2ENR|=1<<26;                            //enabled LTDC clock     
    
RCC->PLLSAICFGR|=0x102<<6;                      //PLLSAIN=254.should be written only if PLLSAI is disabled
RCC->PLLSAICFGR|=5<<28;                         //PLLSAIR=5.should be written only if PLLSAI is disabled
RCC->DCKCFGR|=2<<16;                            //SETS PLLCDCLK(THE DIVIDER AFTER PLLSAIR) 
//LTDC CLOCK IS SET TO 6.45 MHz
RCC->CR|=1<<28;                                 //ENABLE PLLSAI
while(!(RCC->CR & RCC_CR_PLLSAIRDY));           //WAIT FOR PLLSAI TO LOCK        

TIM2->DIER|= 0x0001;              //DMA/IRQ Enable Register - enable IRQ on update 
TIM2->CR1|=1<<3;                  //Counter stops counting at the next update event (clearing the bit CEN)    

//SPI5 CONFIGURATION
SPI5->CR1=0;
SPI5->CR1|=1<<3;                   //BAUDRATE: APB2 WORKS WITH 90MHz.SO PRESCALER=4 AND BAUDRATE=22500000
SPI5->CR1|=1<<2;                   //SPI1 AS MASTER
SPI5->CR1|=1<<15;                  //1-line bidirectional data mode selected
SPI5->CR1|=1<<14;                  //Output enabled (transmit-only mode)
SPI5->CR2|=1<<2;                   //HARDWARE NSS
//SPI5 CONFIGURATION


GPIOC->MODER|=1<<4;
GPIOD->MODER|=1<<26;
GPIOF->MODER|=0x2a<<14;

GPIOF->AFR[0]=0x50000000;
GPIOF->AFR[1]=0x55;

lcd_initialization();

//PIN CONFIGURATION FOR LCD
//All GPIOs have to be configured in very high-speed mode
GPIOA->MODER=0x2802280;
GPIOB->MODER=0xaa000a;
GPIOC->MODER|=0xa000;
GPIOD->MODER|=0x80;
GPIOF->MODER|=0x200000;
GPIOG->MODER=0x2a0a000;

    GPIOA->AFR[0]=0xe0ee000;
    GPIOA->AFR[1]=0xee000;
        
  GPIOB->AFR[0]=0x99;
    //GPIOB->AFR[0]=0xee;
    
  GPIOB->AFR[1]=0xeeee;
    GPIOC->AFR[0]=0xee000000;
  GPIOD->AFR[0]=0xe000;
    GPIOF->AFR[1]|=0xe00;
  GPIOG->AFR[0]=0xee000000;
    
  GPIOG->AFR[1]=0x9e900;
    //GPIOG->AFR[1]=0xeee00;
    
GPIOA->OSPEEDR=0xffffffff;
GPIOB->OSPEEDR=0xffffffff;
GPIOC->OSPEEDR=0xffffffff;
GPIOD->OSPEEDR=0xffffffff;
GPIOF->OSPEEDR=0xffffffff;
GPIOG->OSPEEDR=0xffffffff;
//PIN CONFIGURATION FOR LCD    


LTDC->SSCR=((HSYNC-1)<<16)|(VSYNC-1);                      //Synchronization Size Configuration 
LTDC->BPCR=((HBP-1)<<16)|(VBP-1);                          //Back Porch Configuration
LTDC->AWCR=(ACTIVE_W<<16)|(ACTIVE_H);                      //Active Width Configuration  
LTDC->TWCR=(TOTAL_WIDTH<<16)|(TOTAL_HEIGHT);               //Total Width Configuration

LTDC_Layer1->WHPCR=HBP|((HBP+LCD_WIDTH-1)<<16);            //Window Horizontal Position Configuration 
LTDC_Layer1->WVPCR=VBP|((VBP+LCD_HEIGHT-1)<<16);           //Window Vertical Position Configuration 
         
LTDC_Layer1->PFCR=2;                //Pixel Format Configuration     

LTDC_Layer1->CFBAR=0x10;
LTDC_Layer1->CFBLR=((LCD_WIDTH*10)<<16)|((LCD_WIDTH*10)+3);//Color Frame Buffer Length 
LTDC_Layer1->CR=LTDC_LxCR_LEN;                             //Enable Layer
LTDC->SRCR=LTDC_SRCR_IMR;                                  //Immediate Reload  
//LTDC->GCR=LTDC_GCR_PCPOL;                                   //active high pcpol /
LTDC->GCR|=LTDC_GCR_LTDCEN;                                 //Enable LTDC /

while(1)LTDC->BCCR = 0xff;  //display blue background;

while(1){
if(x>76799)x=0;
x++;
}
      

}


anyway thanks for you replied.

 

Posted

Hi @ASergej

thank you for that.I already seen your code in the first topic and it was good.you had a problem at the end of that topic and you said you solve it yourself.would you please tell me what that problem was?

Posted

dear @inmarket

I`v always been unsuccessful with libraries and also my project has a lot of things except of LCD and if I use those files, I think I will have many problems for debugging my project.I want every thing to be clear and that files and libraries make my project messy. when i glance at those libraries every time I get confused. 

Posted

TomCat

Be careful with HSYNC and VSYNC timing... All problems from their incorrect difinition.

For 6-bit RGB and 18 bit/pixel format:

// timers for HSYNC and VSYNC...
    *pTIMER_DISABLE = 0xFF;    // all timers - stop...
    *pTIMER_STATUS = 0xFFFF; // all flags - clear...
    
    *pTIMER0_CONFIG = 0x02B9;
    *pTIMER1_CONFIG = 0x02B9;
    

// for HSYNC (clk)
    *pTIMER0_WIDTH = 10;

    *pTIMER0_PERIOD = 760; // CLK = (240+13)*3  + 1 = 760 - this is row

// for VSYNC (clk)
    *pTIMER1_WIDTH = 2*760;

    *pTIMER1_PERIOD = 324*760;

// CLK - 10 MHz
    *pTIMER5_CONFIG = 0x0219;
    
    *pTIMER5_WIDTH = 3;
    
    *pTIMER5_PERIOD = 7;
    
    asm("ssync;");

// blackfin DMA PPI...
    
    *pDMA0_CONFIG = 0;         // DMA0 - clear

    *pDMA0_PERIPHERAL_MAP = 0x0000; // set DMA0 for PPI

    *pDMA0_START_ADDR = &DisplayMEM[0]; // set screen array...
    
    *pDMA0_X_COUNT  = 760;
    *pDMA0_X_MODIFY = 1;
    
    *pDMA0_Y_COUNT  = 324;
    *pDMA0_Y_MODIFY = 1;
    
    *pDMA0_CONFIG = 0x1091; // DMA enable...
    
    asm("ssync;");
 

// blackfin PPI...
    *pPPI_STATUS = 0;
    *pPPI_DELAY = 0;

    *pPPI_COUNT = 759; // 760 active byte
    
    *pPPI_CONTROL = 0xC01F;    // PPI enable...
    *pTIMER_ENABLE = 0x3|(1<<5); // running...
     asm("ssync;");
 

We have DisplayMEM - screen array, but it has some "blind" areas.

 

All working code (with descriptor model for BF-527).

In this code, screen array - has NO "blind" areas.

Array is copy of visible screen.

   Init_SPI_LCD();
    
// HW reset
    Reset_HW_LCD();

// SW reset
    Write_CMD_LCD(0x01);
    DummyWait(3000000);    // ~100 ms

// display OFF
    Write_CMD_LCD(0x28);

// Power Control B
    Write_CMD_LCD(0xCF);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x81);
    Write_DATA_LCD(0x30);
    
// Power ON sequence control
    Write_CMD_LCD(0xED);
    Write_DATA_LCD(0x64);
    Write_DATA_LCD(0x03);
    Write_DATA_LCD(0x12);
    Write_DATA_LCD(0x81);
    
// Driver Timing Control A
    Write_CMD_LCD(0xE8);
    Write_DATA_LCD(0x85);
    Write_DATA_LCD(0x01);
    Write_DATA_LCD(0x79);

// Power Control A
    Write_CMD_LCD(0xCB);
    Write_DATA_LCD(0x39);
    Write_DATA_LCD(0x2C);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x34);
    Write_DATA_LCD(0x02);

// Pump ratio control
    Write_CMD_LCD(0xF7);
    Write_DATA_LCD(0x20);

// Driver Timing Control B
    Write_CMD_LCD(0xEA);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);

// Power control 1
    Write_CMD_LCD(0xC0);
    Write_DATA_LCD(0x26);
    
// Power control 2
    Write_CMD_LCD(0xC1);
    Write_DATA_LCD(0x11);
    
// VCOM control 1
    Write_CMD_LCD(0xC5);
    Write_DATA_LCD(0x35);
    Write_DATA_LCD(0x3E);
    
// VCOM control 2
    Write_CMD_LCD(0xC7);
    Write_DATA_LCD(0xBE);

// Memory access control
    Write_CMD_LCD(0x36);
    Write_DATA_LCD(0x48);
    
// Pixel format set
    Write_CMD_LCD(0x3A);
    Write_DATA_LCD(0x66); // 18 bit for pixel
    
// Frame rate control
    Write_CMD_LCD(0xB1);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x10); // 70 Hz
    
// Enable 3Gamma
    Write_CMD_LCD(0xF2);
    Write_DATA_LCD(0x02); // disable

// Gamma set
    Write_CMD_LCD(0x26);
    Write_DATA_LCD(0x01);

// Positive Gamma correction
    Write_CMD_LCD(0xE0);
    Write_DATA_LCD(0x1F);
    Write_DATA_LCD(0x1A);
    Write_DATA_LCD(0x18);
    Write_DATA_LCD(0x0A);
    Write_DATA_LCD(0x0F);
    Write_DATA_LCD(0x06);
    Write_DATA_LCD(0x45);
    Write_DATA_LCD(0x87);
    Write_DATA_LCD(0x32);
    Write_DATA_LCD(0x0A);
    Write_DATA_LCD(0x07);
    Write_DATA_LCD(0x02);
    Write_DATA_LCD(0x1F);
    Write_DATA_LCD(0x07);
    Write_DATA_LCD(0x05);
    Write_DATA_LCD(0x00);
    
// Negative Gamma correction
    Write_CMD_LCD(0xE1);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x25);
    Write_DATA_LCD(0x27);
    Write_DATA_LCD(0x05);
    Write_DATA_LCD(0x10);
    Write_DATA_LCD(0x09);
    Write_DATA_LCD(0x3A);
    Write_DATA_LCD(0x78);
    Write_DATA_LCD(0x4D);
    Write_DATA_LCD(0x05);
    Write_DATA_LCD(0x18);
    Write_DATA_LCD(0x0D);
    Write_DATA_LCD(0x38);
    Write_DATA_LCD(0x3A);
    Write_DATA_LCD(0x1F);
    
// Column set
    Write_CMD_LCD(0x2A);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0xEF);
    
// Page set
    Write_CMD_LCD(0x2B);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x01);
    Write_DATA_LCD(0x3F);
    
// Entry mode set
    Write_CMD_LCD(0xB7);
    Write_DATA_LCD(0x07);
    
// RGB...
    Write_CMD_LCD(0xB5);
    Write_DATA_LCD(0x02);
    Write_DATA_LCD(0x02);
    Write_DATA_LCD(0x0A);
    Write_DATA_LCD(0x14);

    Write_CMD_LCD(0xB0);
    Write_DATA_LCD(0xE0);
    
    Write_CMD_LCD(0xB1);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x1B);
    
    Write_CMD_LCD(0xF6);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x07);
    
// Display function control
    Write_CMD_LCD(0xB6);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x80);
    Write_DATA_LCD(0x27);
    Write_DATA_LCD(0x00);
    
// Sleep OUT
    Write_CMD_LCD(0x11);
    DummyWait(3000000);    // ~100 ms
    
// Display ON
    Write_CMD_LCD(0x29);
    DummyWait(3000000);    // ~100 ms
    
//    Write_CMD_LCD(0x2C);    // start memory write...

// construct discriptor array
    for (i=0;i<328;i++)
    {
        // Next Descr Ptr LOW
        // Next Descr Ptr HIGH
        if (i<327)
        {
            LCD_descriptor_array[0+i*9] = (short)( (int)( &LCD_descriptor_array[0+((i+1)*9)] ) & (int)(0xFFFF));
            LCD_descriptor_array[1+i*9] = (short)( ((int)( &LCD_descriptor_array[0+((i+1)*9)] )>>16) & (int)(0xFFFF));
        } else
        {
            LCD_descriptor_array[0+i*9] = (short)( (int)( &LCD_descriptor_array[0] ) & (int)(0xFFFF));
            LCD_descriptor_array[1+i*9] = (short)( ((int)( &LCD_descriptor_array[0] )>>16) & (int)(0xFFFF));
        }
        
        // Start LINE address LOW
        // Start LINE address HIGH
        if (i<3)
        {
            LCD_descriptor_array[2+i*9] = (short)( (int)( &LCDActivePage[0] ) & (int)(0xFFFF));
            LCD_descriptor_array[3+i*9] = (short)( ((int)( &LCDActivePage[0] )>>16) & (int)(0xFFFF));
        } else
        {
            LCD_descriptor_array[2+i*9] = (short)( (int)( &LCDActivePage[(i-3)*720] ) & (int)(0xFFFF));
            LCD_descriptor_array[3+i*9] = (short)( ((int)( &LCDActivePage[(i-3)*720] )>>16) & (int)(0xFFFF));
        }
        
        // DMA CONFIG (16 bit)
        LCD_descriptor_array[4+i*9] = 0x7981;
        
        // X count...
        LCD_descriptor_array[5+i*9] = 741;
        
        // X modify...
        LCD_descriptor_array[6+i*9] = 1;
        
        // Y count...
        LCD_descriptor_array[7+i*9] = 1;
        
        // Y modify...
        LCD_descriptor_array[8+i*9] = 1;
    }

// DMA for PPI...
    *pDMA0_CONFIG = 0;         // clear DMA0

    *pDMA0_PERIPHERAL_MAP = 0x0000; // connect DMA0 for PPI
    
    *pDMA0_NEXT_DESC_PTR = &LCD_descriptor_array[9];

    *pDMA0_START_ADDR = &LCDActivePage[0];
    
    *pDMA0_X_COUNT  = LCD_descriptor_array[5];
    
    *pDMA0_X_MODIFY = LCD_descriptor_array[6];
    
    *pDMA0_Y_COUNT  = LCD_descriptor_array[7];
    
    *pDMA0_Y_MODIFY = LCD_descriptor_array[8];
    
    *pDMA0_CONFIG = LCD_descriptor_array[4]; // DMA enable...

    asm("ssync;");

// timers for HSYNC and VSYNC...
    *pTIMER_DISABLE = 0xFF;    // all timers - stop...
    
    *pTIMER_STATUS = 0xFFFF; // all flags - clear...
    
    *pTIMER0_CONFIG = 0x02B9;
    
    *pTIMER1_CONFIG = 0x02B9;
    

// HSYNC
    *pTIMER0_WIDTH = 10;

    *pTIMER0_PERIOD = 760;
    

// VSYNC
    *pTIMER1_WIDTH = 2*760;

    *pTIMER1_PERIOD = 328*760;
    

// DOTCLK (10 MHz)
    *pTIMER5_CONFIG = 0x0219;
    
    *pTIMER5_WIDTH = 4; // 4
    
    *pTIMER5_PERIOD = 8; // 8
    
    asm("ssync;");

// PPI...
    *pPPI_STATUS = 0;
    
    *pPPI_DELAY = 19;

    *pPPI_COUNT = 759;
    
    *pPPI_CONTROL = 0xC01F;    // PPI enable...
    
    *pTIMER_ENABLE = 0x3|(1<<5); // running...
    
    asm("ssync;");

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