RA8875 flicker

[crteensy]

I have a 5", 480*272 tft driven by an RA8875 and I'd like to get flicker-free updates. At this resolution the controller provides two layers and I use one to draw on, while the other is being displayed. That works in principle, but when I switch between layers the graphics seem to disappear for a short moment, causing severe flicker. Here is my layer swapping function:

void ra8875_swap()
{
  static bool draw_1 = true;
  ra8875_acquire_bus();
  if (draw_1) // switch to drawing on layer two
  {
    ra8875_write_index(RA8875_MWCR1);
    ra8875_write_data(1); // active drawing layer: 2
    ra8875_write_index(RA8875_LTPR0);
    ra8875_write_data(0); // active display layer: 1
    draw_1 = false;
  }
  else
  {
    ra8875_write_index(RA8875_MWCR1);
    ra8875_write_data(0); // active drawing layer: 1
    ra8875_write_index(RA8875_LTPR0);
    ra8875_write_data(1); // active display layer: 2
    draw_1 = true;
  }
  // set active window to full screen
  ra8875_write_index(RA8875_HSAW0);
  ra8875_write_data(0);
  ra8875_write_index(RA8875_HSAW1);
  ra8875_write_data(0);
  ra8875_write_index(RA8875_VSAW0);
  ra8875_write_data(0);
  ra8875_write_index(RA8875_VSAW1);
  ra8875_write_data(0);
  ra8875_write_index(RA8875_HEAW0);
  ra8875_write_data((width-1) & 0xFF);
  ra8875_write_index(RA8875_HEAW1);
  ra8875_write_data((width-1) >> 8);
  ra8875_write_index(RA8875_VEAW0);
  ra8875_write_data((height-1) & 0xFF);
  ra8875_write_index(RA8875_VEAW1);
  ra8875_write_data((height-1) >> 8);
  ra8875_write_index(RA8875_MCLR);
  // start clearing active window of active drawing layer
  ra8875_write_data((1<<7) | (1<<6));
  ra8875_release_bus();
}

Whenever I finished drawing I call ra8875_swap(), which swaps drawing and displaying layers and clears the new drawing layer. Am I doing something wrong or is there another way of getting flicker-free updates?

[inmarket]

Without reading the controller data sheet in detail, I suspect the buffer swapping needs to be delayed until a vertical blanking period.

There will be a pin interrupt or a register to poll which will tell you when the appropriate time has come to swap the buffers.

[crteensy]

I haven't seen any vertical synchronizing mechanism in the datasheet, and I think even then it would be very hard to hit the sweet spot regarding timing.