Does SSD1963 need RD port at all?

[pastaclub]

It seems that SSD1963 does not use the RD port. I had a look at board_ssd1963_gpio.h. It defines two macros for setting and clearing this pin (Set_RD, Clr_RD), however Clr_RD is never called. Can RD simply be wired to VDD? (by the way, the UTFT library suggests wiring RD to VDD for SSD1963).

And another question: am I right to assume that palSetPad sets any pin to low and palClearPad sets it to high? I am trying to convert the driver to Teensy and I am a bit confused because the naming seems to be inverse to what it supposedly does.

[inmarket]

The macros using set_rd and clr_rd are macros for a reason.

Those pins may be used within a gdisp hardware abstraction layer file to implement the GDISP reading functionality. If your driver or your hardware implementation does not support reading then those macros are unnecessary and, like the uftf library does, you can tie the physical pin up.

With regard to the palSetPad and palClearPad, this refers to the LOGICAL level, not necessarily the physical voltage. Depending on your hardware it may be using negative or open collector logic which would give you the effect you see.

Note: there are also some user contributed drivers that actually do get this the wrong way around. I am not sure without digging if the SSD1963 driver is one of those.