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ASergej

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Posts posted by ASergej

  1. Be careful with HSYNC and VSYNC timing... All problems from their incorrect difinition.

    For 6-bit RGB and 18 bit/pixel format:

    // timers for HSYNC and VSYNC...
        *pTIMER_DISABLE = 0xFF;    // all timers - stop...
        *pTIMER_STATUS = 0xFFFF; // all flags - clear...
        
        *pTIMER0_CONFIG = 0x02B9;
        *pTIMER1_CONFIG = 0x02B9;
        

    // for HSYNC (clk)
        *pTIMER0_WIDTH = 10;

        *pTIMER0_PERIOD = 760; // CLK = (240+13)*3  + 1 = 760 - this is row

    // for VSYNC (clk)
        *pTIMER1_WIDTH = 2*760;

        *pTIMER1_PERIOD = 324*760;

    // CLK - 10 MHz
        *pTIMER5_CONFIG = 0x0219;
        
        *pTIMER5_WIDTH = 3;
        
        *pTIMER5_PERIOD = 7;
        
        asm("ssync;");

    // blackfin DMA PPI...
        
        *pDMA0_CONFIG = 0;         // DMA0 - clear

        *pDMA0_PERIPHERAL_MAP = 0x0000; // set DMA0 for PPI

        *pDMA0_START_ADDR = &DisplayMEM[0]; // set screen array...
        
        *pDMA0_X_COUNT  = 760;
        *pDMA0_X_MODIFY = 1;
        
        *pDMA0_Y_COUNT  = 324;
        *pDMA0_Y_MODIFY = 1;
        
        *pDMA0_CONFIG = 0x1091; // DMA enable...
        
        asm("ssync;");
     

    // blackfin PPI...
        *pPPI_STATUS = 0;
        *pPPI_DELAY = 0;

        *pPPI_COUNT = 759; // 760 active byte
        
        *pPPI_CONTROL = 0xC01F;    // PPI enable...
        *pTIMER_ENABLE = 0x3|(1<<5); // running...
         asm("ssync;");
     

    We have DisplayMEM - screen array, but it has some "blind" areas.

     

    All working code (with descriptor model for BF-527).

    In this code, screen array - has NO "blind" areas.

    Array is copy of visible screen.

       Init_SPI_LCD();
        
    // HW reset
        Reset_HW_LCD();

    // SW reset
        Write_CMD_LCD(0x01);
        DummyWait(3000000);    // ~100 ms

    // display OFF
        Write_CMD_LCD(0x28);

    // Power Control B
        Write_CMD_LCD(0xCF);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x81);
        Write_DATA_LCD(0x30);
        
    // Power ON sequence control
        Write_CMD_LCD(0xED);
        Write_DATA_LCD(0x64);
        Write_DATA_LCD(0x03);
        Write_DATA_LCD(0x12);
        Write_DATA_LCD(0x81);
        
    // Driver Timing Control A
        Write_CMD_LCD(0xE8);
        Write_DATA_LCD(0x85);
        Write_DATA_LCD(0x01);
        Write_DATA_LCD(0x79);

    // Power Control A
        Write_CMD_LCD(0xCB);
        Write_DATA_LCD(0x39);
        Write_DATA_LCD(0x2C);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x34);
        Write_DATA_LCD(0x02);

    // Pump ratio control
        Write_CMD_LCD(0xF7);
        Write_DATA_LCD(0x20);

    // Driver Timing Control B
        Write_CMD_LCD(0xEA);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);

    // Power control 1
        Write_CMD_LCD(0xC0);
        Write_DATA_LCD(0x26);
        
    // Power control 2
        Write_CMD_LCD(0xC1);
        Write_DATA_LCD(0x11);
        
    // VCOM control 1
        Write_CMD_LCD(0xC5);
        Write_DATA_LCD(0x35);
        Write_DATA_LCD(0x3E);
        
    // VCOM control 2
        Write_CMD_LCD(0xC7);
        Write_DATA_LCD(0xBE);

    // Memory access control
        Write_CMD_LCD(0x36);
        Write_DATA_LCD(0x48);
        
    // Pixel format set
        Write_CMD_LCD(0x3A);
        Write_DATA_LCD(0x66); // 18 bit for pixel
        
    // Frame rate control
        Write_CMD_LCD(0xB1);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x10); // 70 Hz
        
    // Enable 3Gamma
        Write_CMD_LCD(0xF2);
        Write_DATA_LCD(0x02); // disable

    // Gamma set
        Write_CMD_LCD(0x26);
        Write_DATA_LCD(0x01);

    // Positive Gamma correction
        Write_CMD_LCD(0xE0);
        Write_DATA_LCD(0x1F);
        Write_DATA_LCD(0x1A);
        Write_DATA_LCD(0x18);
        Write_DATA_LCD(0x0A);
        Write_DATA_LCD(0x0F);
        Write_DATA_LCD(0x06);
        Write_DATA_LCD(0x45);
        Write_DATA_LCD(0x87);
        Write_DATA_LCD(0x32);
        Write_DATA_LCD(0x0A);
        Write_DATA_LCD(0x07);
        Write_DATA_LCD(0x02);
        Write_DATA_LCD(0x1F);
        Write_DATA_LCD(0x07);
        Write_DATA_LCD(0x05);
        Write_DATA_LCD(0x00);
        
    // Negative Gamma correction
        Write_CMD_LCD(0xE1);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x25);
        Write_DATA_LCD(0x27);
        Write_DATA_LCD(0x05);
        Write_DATA_LCD(0x10);
        Write_DATA_LCD(0x09);
        Write_DATA_LCD(0x3A);
        Write_DATA_LCD(0x78);
        Write_DATA_LCD(0x4D);
        Write_DATA_LCD(0x05);
        Write_DATA_LCD(0x18);
        Write_DATA_LCD(0x0D);
        Write_DATA_LCD(0x38);
        Write_DATA_LCD(0x3A);
        Write_DATA_LCD(0x1F);
        
    // Column set
        Write_CMD_LCD(0x2A);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0xEF);
        
    // Page set
        Write_CMD_LCD(0x2B);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x01);
        Write_DATA_LCD(0x3F);
        
    // Entry mode set
        Write_CMD_LCD(0xB7);
        Write_DATA_LCD(0x07);
        
    // RGB...
        Write_CMD_LCD(0xB5);
        Write_DATA_LCD(0x02);
        Write_DATA_LCD(0x02);
        Write_DATA_LCD(0x0A);
        Write_DATA_LCD(0x14);

        Write_CMD_LCD(0xB0);
        Write_DATA_LCD(0xE0);
        
        Write_CMD_LCD(0xB1);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x1B);
        
        Write_CMD_LCD(0xF6);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x07);
        
    // Display function control
        Write_CMD_LCD(0xB6);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x80);
        Write_DATA_LCD(0x27);
        Write_DATA_LCD(0x00);
        
    // Sleep OUT
        Write_CMD_LCD(0x11);
        DummyWait(3000000);    // ~100 ms
        
    // Display ON
        Write_CMD_LCD(0x29);
        DummyWait(3000000);    // ~100 ms
        
    //    Write_CMD_LCD(0x2C);    // start memory write...

    // construct discriptor array
        for (i=0;i<328;i++)
        {
            // Next Descr Ptr LOW
            // Next Descr Ptr HIGH
            if (i<327)
            {
                LCD_descriptor_array[0+i*9] = (short)( (int)( &LCD_descriptor_array[0+((i+1)*9)] ) & (int)(0xFFFF));
                LCD_descriptor_array[1+i*9] = (short)( ((int)( &LCD_descriptor_array[0+((i+1)*9)] )>>16) & (int)(0xFFFF));
            } else
            {
                LCD_descriptor_array[0+i*9] = (short)( (int)( &LCD_descriptor_array[0] ) & (int)(0xFFFF));
                LCD_descriptor_array[1+i*9] = (short)( ((int)( &LCD_descriptor_array[0] )>>16) & (int)(0xFFFF));
            }
            
            // Start LINE address LOW
            // Start LINE address HIGH
            if (i<3)
            {
                LCD_descriptor_array[2+i*9] = (short)( (int)( &LCDActivePage[0] ) & (int)(0xFFFF));
                LCD_descriptor_array[3+i*9] = (short)( ((int)( &LCDActivePage[0] )>>16) & (int)(0xFFFF));
            } else
            {
                LCD_descriptor_array[2+i*9] = (short)( (int)( &LCDActivePage[(i-3)*720] ) & (int)(0xFFFF));
                LCD_descriptor_array[3+i*9] = (short)( ((int)( &LCDActivePage[(i-3)*720] )>>16) & (int)(0xFFFF));
            }
            
            // DMA CONFIG (16 bit)
            LCD_descriptor_array[4+i*9] = 0x7981;
            
            // X count...
            LCD_descriptor_array[5+i*9] = 741;
            
            // X modify...
            LCD_descriptor_array[6+i*9] = 1;
            
            // Y count...
            LCD_descriptor_array[7+i*9] = 1;
            
            // Y modify...
            LCD_descriptor_array[8+i*9] = 1;
        }

    // DMA for PPI...
        *pDMA0_CONFIG = 0;         // clear DMA0

        *pDMA0_PERIPHERAL_MAP = 0x0000; // connect DMA0 for PPI
        
        *pDMA0_NEXT_DESC_PTR = &LCD_descriptor_array[9];

        *pDMA0_START_ADDR = &LCDActivePage[0];
        
        *pDMA0_X_COUNT  = LCD_descriptor_array[5];
        
        *pDMA0_X_MODIFY = LCD_descriptor_array[6];
        
        *pDMA0_Y_COUNT  = LCD_descriptor_array[7];
        
        *pDMA0_Y_MODIFY = LCD_descriptor_array[8];
        
        *pDMA0_CONFIG = LCD_descriptor_array[4]; // DMA enable...

        asm("ssync;");

    // timers for HSYNC and VSYNC...
        *pTIMER_DISABLE = 0xFF;    // all timers - stop...
        
        *pTIMER_STATUS = 0xFFFF; // all flags - clear...
        
        *pTIMER0_CONFIG = 0x02B9;
        
        *pTIMER1_CONFIG = 0x02B9;
        

    // HSYNC
        *pTIMER0_WIDTH = 10;

        *pTIMER0_PERIOD = 760;
        

    // VSYNC
        *pTIMER1_WIDTH = 2*760;

        *pTIMER1_PERIOD = 328*760;
        

    // DOTCLK (10 MHz)
        *pTIMER5_CONFIG = 0x0219;
        
        *pTIMER5_WIDTH = 4; // 4
        
        *pTIMER5_PERIOD = 8; // 8
        
        asm("ssync;");

    // PPI...
        *pPPI_STATUS = 0;
        
        *pPPI_DELAY = 19;

        *pPPI_COUNT = 759;
        
        *pPPI_CONTROL = 0xC01F;    // PPI enable...
        
        *pTIMER_ENABLE = 0x3|(1<<5); // running...
        
        asm("ssync;");

  2. TomCat

    Be careful with HSYNC and VSYNC timing... All problems from their incorrect difinition.

    For 6-bit RGB and 18 bit/pixel format:

    // timers for HSYNC and VSYNC...
        *pTIMER_DISABLE = 0xFF;    // all timers - stop...
        *pTIMER_STATUS = 0xFFFF; // all flags - clear...
        
        *pTIMER0_CONFIG = 0x02B9;
        *pTIMER1_CONFIG = 0x02B9;
        

    // for HSYNC (clk)
        *pTIMER0_WIDTH = 10;

        *pTIMER0_PERIOD = 760; // CLK = (240+13)*3  + 1 = 760 - this is row

    // for VSYNC (clk)
        *pTIMER1_WIDTH = 2*760;

        *pTIMER1_PERIOD = 324*760;

    // CLK - 10 MHz
        *pTIMER5_CONFIG = 0x0219;
        
        *pTIMER5_WIDTH = 3;
        
        *pTIMER5_PERIOD = 7;
        
        asm("ssync;");

    // blackfin DMA PPI...
        
        *pDMA0_CONFIG = 0;         // DMA0 - clear

        *pDMA0_PERIPHERAL_MAP = 0x0000; // set DMA0 for PPI

        *pDMA0_START_ADDR = &DisplayMEM[0]; // set screen array...
        
        *pDMA0_X_COUNT  = 760;
        *pDMA0_X_MODIFY = 1;
        
        *pDMA0_Y_COUNT  = 324;
        *pDMA0_Y_MODIFY = 1;
        
        *pDMA0_CONFIG = 0x1091; // DMA enable...
        
        asm("ssync;");
     

    // blackfin PPI...
        *pPPI_STATUS = 0;
        *pPPI_DELAY = 0;

        *pPPI_COUNT = 759; // 760 active byte
        
        *pPPI_CONTROL = 0xC01F;    // PPI enable...
        *pTIMER_ENABLE = 0x3|(1<<5); // running...
         asm("ssync;");
     

    We have DisplayMEM - screen array, but it has some "blind" areas.

     

    All working code (with descriptor model for BF-527).

    In this code, screen array - has NO "blind" areas.

    Array is copy of visible screen.

       Init_SPI_LCD();
        
    // HW reset
        Reset_HW_LCD();

    // SW reset
        Write_CMD_LCD(0x01);
        DummyWait(3000000);    // ~100 ms

    // display OFF
        Write_CMD_LCD(0x28);

    // Power Control B
        Write_CMD_LCD(0xCF);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x81);
        Write_DATA_LCD(0x30);
        
    // Power ON sequence control
        Write_CMD_LCD(0xED);
        Write_DATA_LCD(0x64);
        Write_DATA_LCD(0x03);
        Write_DATA_LCD(0x12);
        Write_DATA_LCD(0x81);
        
    // Driver Timing Control A
        Write_CMD_LCD(0xE8);
        Write_DATA_LCD(0x85);
        Write_DATA_LCD(0x01);
        Write_DATA_LCD(0x79);

    // Power Control A
        Write_CMD_LCD(0xCB);
        Write_DATA_LCD(0x39);
        Write_DATA_LCD(0x2C);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x34);
        Write_DATA_LCD(0x02);

    // Pump ratio control
        Write_CMD_LCD(0xF7);
        Write_DATA_LCD(0x20);

    // Driver Timing Control B
        Write_CMD_LCD(0xEA);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);

    // Power control 1
        Write_CMD_LCD(0xC0);
        Write_DATA_LCD(0x26);
        
    // Power control 2
        Write_CMD_LCD(0xC1);
        Write_DATA_LCD(0x11);
        
    // VCOM control 1
        Write_CMD_LCD(0xC5);
        Write_DATA_LCD(0x35);
        Write_DATA_LCD(0x3E);
        
    // VCOM control 2
        Write_CMD_LCD(0xC7);
        Write_DATA_LCD(0xBE);

    // Memory access control
        Write_CMD_LCD(0x36);
        Write_DATA_LCD(0x48);
        
    // Pixel format set
        Write_CMD_LCD(0x3A);
        Write_DATA_LCD(0x66); // 18 bit for pixel
        
    // Frame rate control
        Write_CMD_LCD(0xB1);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x10); // 70 Hz
        
    // Enable 3Gamma
        Write_CMD_LCD(0xF2);
        Write_DATA_LCD(0x02); // disable

    // Gamma set
        Write_CMD_LCD(0x26);
        Write_DATA_LCD(0x01);

    // Positive Gamma correction
        Write_CMD_LCD(0xE0);
        Write_DATA_LCD(0x1F);
        Write_DATA_LCD(0x1A);
        Write_DATA_LCD(0x18);
        Write_DATA_LCD(0x0A);
        Write_DATA_LCD(0x0F);
        Write_DATA_LCD(0x06);
        Write_DATA_LCD(0x45);
        Write_DATA_LCD(0x87);
        Write_DATA_LCD(0x32);
        Write_DATA_LCD(0x0A);
        Write_DATA_LCD(0x07);
        Write_DATA_LCD(0x02);
        Write_DATA_LCD(0x1F);
        Write_DATA_LCD(0x07);
        Write_DATA_LCD(0x05);
        Write_DATA_LCD(0x00);
        
    // Negative Gamma correction
        Write_CMD_LCD(0xE1);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x25);
        Write_DATA_LCD(0x27);
        Write_DATA_LCD(0x05);
        Write_DATA_LCD(0x10);
        Write_DATA_LCD(0x09);
        Write_DATA_LCD(0x3A);
        Write_DATA_LCD(0x78);
        Write_DATA_LCD(0x4D);
        Write_DATA_LCD(0x05);
        Write_DATA_LCD(0x18);
        Write_DATA_LCD(0x0D);
        Write_DATA_LCD(0x38);
        Write_DATA_LCD(0x3A);
        Write_DATA_LCD(0x1F);
        
    // Column set
        Write_CMD_LCD(0x2A);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0xEF);
        
    // Page set
        Write_CMD_LCD(0x2B);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x01);
        Write_DATA_LCD(0x3F);
        
    // Entry mode set
        Write_CMD_LCD(0xB7);
        Write_DATA_LCD(0x07);
        
    // RGB...
        Write_CMD_LCD(0xB5);
        Write_DATA_LCD(0x02);
        Write_DATA_LCD(0x02);
        Write_DATA_LCD(0x0A);
        Write_DATA_LCD(0x14);

        Write_CMD_LCD(0xB0);
        Write_DATA_LCD(0xE0);
        
        Write_CMD_LCD(0xB1);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x1B);
        
        Write_CMD_LCD(0xF6);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x07);
        
    // Display function control
        Write_CMD_LCD(0xB6);
        Write_DATA_LCD(0x00);
        Write_DATA_LCD(0x80);
        Write_DATA_LCD(0x27);
        Write_DATA_LCD(0x00);
        
    // Sleep OUT
        Write_CMD_LCD(0x11);
        DummyWait(3000000);    // ~100 ms
        
    // Display ON
        Write_CMD_LCD(0x29);
        DummyWait(3000000);    // ~100 ms
        
    //    Write_CMD_LCD(0x2C);    // start memory write...

    // construct discriptor array
        for (i=0;i<328;i++)
        {
            // Next Descr Ptr LOW
            // Next Descr Ptr HIGH
            if (i<327)
            {
                LCD_descriptor_array[0+i*9] = (short)( (int)( &LCD_descriptor_array[0+((i+1)*9)] ) & (int)(0xFFFF));
                LCD_descriptor_array[1+i*9] = (short)( ((int)( &LCD_descriptor_array[0+((i+1)*9)] )>>16) & (int)(0xFFFF));
            } else
            {
                LCD_descriptor_array[0+i*9] = (short)( (int)( &LCD_descriptor_array[0] ) & (int)(0xFFFF));
                LCD_descriptor_array[1+i*9] = (short)( ((int)( &LCD_descriptor_array[0] )>>16) & (int)(0xFFFF));
            }
            
            // Start LINE address LOW
            // Start LINE address HIGH
            if (i<3)
            {
                LCD_descriptor_array[2+i*9] = (short)( (int)( &LCDActivePage[0] ) & (int)(0xFFFF));
                LCD_descriptor_array[3+i*9] = (short)( ((int)( &LCDActivePage[0] )>>16) & (int)(0xFFFF));
            } else
            {
                LCD_descriptor_array[2+i*9] = (short)( (int)( &LCDActivePage[(i-3)*720] ) & (int)(0xFFFF));
                LCD_descriptor_array[3+i*9] = (short)( ((int)( &LCDActivePage[(i-3)*720] )>>16) & (int)(0xFFFF));
            }
            
            // DMA CONFIG (16 bit)
            LCD_descriptor_array[4+i*9] = 0x7981;
            
            // X count...
            LCD_descriptor_array[5+i*9] = 741;
            
            // X modify...
            LCD_descriptor_array[6+i*9] = 1;
            
            // Y count...
            LCD_descriptor_array[7+i*9] = 1;
            
            // Y modify...
            LCD_descriptor_array[8+i*9] = 1;
        }

    // DMA for PPI...
        *pDMA0_CONFIG = 0;         // clear DMA0

        *pDMA0_PERIPHERAL_MAP = 0x0000; // connect DMA0 for PPI
        
        *pDMA0_NEXT_DESC_PTR = &LCD_descriptor_array[9];

        *pDMA0_START_ADDR = &LCDActivePage[0];
        
        *pDMA0_X_COUNT  = LCD_descriptor_array[5];
        
        *pDMA0_X_MODIFY = LCD_descriptor_array[6];
        
        *pDMA0_Y_COUNT  = LCD_descriptor_array[7];
        
        *pDMA0_Y_MODIFY = LCD_descriptor_array[8];
        
        *pDMA0_CONFIG = LCD_descriptor_array[4]; // DMA enable...

        asm("ssync;");

    // timers for HSYNC and VSYNC...
        *pTIMER_DISABLE = 0xFF;    // all timers - stop...
        
        *pTIMER_STATUS = 0xFFFF; // all flags - clear...
        
        *pTIMER0_CONFIG = 0x02B9;
        
        *pTIMER1_CONFIG = 0x02B9;
        

    // HSYNC
        *pTIMER0_WIDTH = 10;

        *pTIMER0_PERIOD = 760;
        

    // VSYNC
        *pTIMER1_WIDTH = 2*760;

        *pTIMER1_PERIOD = 328*760;
        

    // DOTCLK (10 MHz)
        *pTIMER5_CONFIG = 0x0219;
        
        *pTIMER5_WIDTH = 4; // 4
        
        *pTIMER5_PERIOD = 8; // 8
        
        asm("ssync;");

    // PPI...
        *pPPI_STATUS = 0;
        
        *pPPI_DELAY = 19;

        *pPPI_COUNT = 759;
        
        *pPPI_CONTROL = 0xC01F;    // PPI enable...
        
        *pTIMER_ENABLE = 0x3|(1<<5); // running...
        
        asm("ssync;");

  3. 1 hour ago, TomCat said:

    Hi.I`m working on a stm32f429 discovery and have problem with the LCD.I`v done any thing for SPI interface with iLi9341 and that was successful.but I wanna configure iLi9341 with SPI to send display data through st`s LTDC peripheral and thats my big problem.can anyone help me?

    Hi!

    If you want, I can give you and this community my working code for ADSP-BF527 (ILI9341 in 6-bit RGB mode). Is this help you?

  4. Of course, you're right. I don't use MCU (i-8080) interface.

    I setup the display using SPI interface (I wrote to you about this befor), and after that I start to transmit data continuously via parallel RGB-interface.

    I use ADSP-BF527 DSP. This is very fast DSP and it have PPI-interface for connecting to RGB-interface. But It does not matter.

    Because, I wrote to you, that in full 18-bit RGB mode - all is working properly, but LCD don't work in 3x6-bit RGB mode (3 transfer for 1 pixel RGB mode).

    All is working in 18-bit RGB mode - it means, I generate all signal properly: all what I write in the source code - I have physically.

    I wrote to you:

    "I think, I'm wrong in some signal's parameters in this 6-bit RGB mode... period or width Thsync, Tvsync... or, may be, some settings of ILI9341..."

    For 3x6 bit RGB mode

    The command 0xB5 sets: VFP = 0x4,VBP=0x2,HFP=0xA,HBP=0x14 (page 46)

    Tlow HSYNC = 10 DOTCLK, Tlow VSYNC = 2 lines

    HSYNC: Tlow = 10 DOTCLK, Tperiod = Tlow + HBP + 240 pixels*3 transfer + HFP = 10 + 20 + 240*3 + 10 = 760 DOTCLK

    VSYNC: Tlow = 2 lines, Tperiod = Tlow + VBP + 320 lines + VFP = 2 + 2 + 320 + 4 = 328 lines => Tperiod = 328*760 DOTCLK

    And I have 3 displays MIO283. All of them working alike.

    What do you think about PCDIV? (0xB6 command and page 47)

    What value do I need to set for PCDIV, DIV and RTN?

    P.S.: for 18-bit RGB mode.

    HSYNC: Tperiod = 280 DOTCLK, Tlow = 10 DOTCLK

    VSYNC: Tperiod = 328*280 DOTCLK, Tlow = 2*280 DOTCLK

    Freq DOTCLK = 6,35 MHz.

    In this mode all working properly!

  5. Thank you very much for your answere.

    This is my custom board with BF-527. But despite this, I've never seen init-code for ILI93xx in 6/8 RGB mode for any dev-board (wich mcu - it does not matter) .

    Yes, I check all signals and all of them look good. And rising/falling edges - is ok. 8 MHz - it's not this problem.

    Furthermore, I transmit data to display in:

    1) SPI-mode (via SPI) - it's all ok;

    2) 18-bit RGB-mode, but I used only lower 6-bit of data (D0-D5) and I saw only blue or black color on the screen. Another 12 bit of data - I tied them to ground. It means - it's all ok in this mode.

    I think, I'm wrong in some signal's parameters in this 6-bit RGB mode... period or width Thsync, Tvsync... or, may be, some settings of ILI9341...

    But I have no idea where I could be wrong.

    Thank you for your help!

  6. Hi!

    I'm trying to start using uGFX with ILI9341 (MIO283QT-13) via 6-bit RGB-mode. And I have some problems with the display driver.

    I setup the display using SPI:


    // HW reset
    Reset_HW_LCD();

    // SW reset
    Write_CMD_LCD(0x01);
    DummyWait(30000); // ~1 ms

    // display OFF
    Write_CMD_LCD(0x28);

    // Power Control B
    Write_CMD_LCD(0xCF);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x81);
    Write_DATA_LCD(0x30);

    // Power ON sequence control
    Write_CMD_LCD(0xED);
    Write_DATA_LCD(0x64);
    Write_DATA_LCD(0x03);
    Write_DATA_LCD(0x12);
    Write_DATA_LCD(0x81);

    // Driver Timing Control A
    Write_CMD_LCD(0xE8);
    Write_DATA_LCD(0x85);
    Write_DATA_LCD(0x01);
    Write_DATA_LCD(0x79);

    // Power Control A
    Write_CMD_LCD(0xCB);
    Write_DATA_LCD(0x39);
    Write_DATA_LCD(0x2C);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x34);
    Write_DATA_LCD(0x02);

    // Pump ratio control
    Write_CMD_LCD(0xF7);
    Write_DATA_LCD(0x20);

    // Driver Timing Control B
    Write_CMD_LCD(0xEA);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);

    // Power control 1
    Write_CMD_LCD(0xC0);
    Write_DATA_LCD(0x26);

    // Power control 2
    Write_CMD_LCD(0xC1);
    Write_DATA_LCD(0x11);

    // VCOM control 1
    Write_CMD_LCD(0xC5);
    Write_DATA_LCD(0x35);
    Write_DATA_LCD(0x3E);

    // VCOM control 2
    Write_CMD_LCD(0xC7);
    Write_DATA_LCD(0xBE);

    // Memory access control
    Write_CMD_LCD(0x36);
    Write_DATA_LCD(0x48);

    // Pixel format set
    Write_CMD_LCD(0x3A);
    Write_DATA_LCD(0x66); // 18 bit for pixel

    // Frame rate control
    Write_CMD_LCD(0xB1);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x1B);

    // Enable 3Gamma
    Write_CMD_LCD(0xF2);
    Write_DATA_LCD(0x02);

    // Gamma set
    Write_CMD_LCD(0x26);
    Write_DATA_LCD(0x01);

    // Positive Gamma correction
    Write_CMD_LCD(0xE0);
    Write_DATA_LCD(0x1F);
    Write_DATA_LCD(0x1A);
    Write_DATA_LCD(0x18);
    Write_DATA_LCD(0x0A);
    Write_DATA_LCD(0x0F);
    Write_DATA_LCD(0x06);
    Write_DATA_LCD(0x45);
    Write_DATA_LCD(0x87);
    Write_DATA_LCD(0x32);
    Write_DATA_LCD(0x0A);
    Write_DATA_LCD(0x07);
    Write_DATA_LCD(0x02);
    Write_DATA_LCD(0x1F);
    Write_DATA_LCD(0x07);
    Write_DATA_LCD(0x05);
    Write_DATA_LCD(0x00);

    // Negative Gamma correction
    Write_CMD_LCD(0xE1);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x25);
    Write_DATA_LCD(0x27);
    Write_DATA_LCD(0x05);
    Write_DATA_LCD(0x10);
    Write_DATA_LCD(0x09);
    Write_DATA_LCD(0x3A);
    Write_DATA_LCD(0x78);
    Write_DATA_LCD(0x4D);
    Write_DATA_LCD(0x05);
    Write_DATA_LCD(0x18);
    Write_DATA_LCD(0x0D);
    Write_DATA_LCD(0x38);
    Write_DATA_LCD(0x3A);
    Write_DATA_LCD(0x1F);

    // Column set
    Write_CMD_LCD(0x2A);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0xEF);

    // Page set
    Write_CMD_LCD(0x2B);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x01);
    Write_DATA_LCD(0x3F);

    // Entry mode set
    Write_CMD_LCD(0xB7);
    Write_DATA_LCD(0x07);

    // RGB...
    Write_CMD_LCD(0xB5);
    Write_DATA_LCD(0x04);
    Write_DATA_LCD(0x02);
    Write_DATA_LCD(0x0A);
    Write_DATA_LCD(0x14);

    Write_CMD_LCD(0xB0);
    Write_DATA_LCD(0x60);

    Write_CMD_LCD(0xB1);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x1F);

    Write_CMD_LCD(0xF6);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x07);

    // Display function control
    Write_CMD_LCD(0xB6);
    Write_DATA_LCD(0x00);
    Write_DATA_LCD(0x80);
    Write_DATA_LCD(0x27);
    Write_DATA_LCD(0x00);

    // Sleep OUT
    Write_CMD_LCD(0x11);
    DummyWait(3000000); // ~100 ms

    // Display ON
    Write_CMD_LCD(0x29);
    DummyWait(3000000); // ~100 ms

    Write_CMD_LCD(0x2C);

    After that, I start transfer data via parallel interface. I send: 1) all data "0xFF" or 2) all data "0x00".

    DOTCLK = 8 MHz, 6-bit parallel (3 transfer/pixel), Thsync = 10 dotclk width, Thsync = 760 dotclk period and Tvsync = 2*760 dotclk width and Tvsync = 324*760 dotclk period

    But in both cases I see only white-gray lines on the display.

    What am I doing wrong?

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